A pillar drill at Berwickshire Engineering is in use all day. One warning
unit must warn the supervisor if the motor is overheating, or the
emergency stop has been pressed, or the guard has been left open. The
workshop is noisy and ear defenders are worn, so the warning has to be
seen as well as heard. The real sensors are not available in the lab, so
each one is simulated by a switch.
The warning must be seen and heard — the lamp and the buzzer come on together. What goes in the middle is the part you are marked on.
Your three inputs
Each one is an SPDT (changeover) switch with a 10 kΩ pull-down resistor.
Input
Simulates
Logic 1 means
A
Motor temperature sensor
the motor is too hot
B
Emergency stop
the emergency stop has been pressed
C
Guard interlock
the guard is closed
Read this one twice. Input C reads logic 1 when the machine
is safe, not when there is a fault. Think carefully about what that means
for your design.
The full brief and the specification the process and output must meet are on
booklet p.3–4 — read those pages properly, don't work from this screen alone.
Overview
The ten stages
Tap a number to jump to that stage. Stages 1 to 6 design the system and plan
the build on paper. Stages 7, 8 and 9 build one sub-system at a time —
each board is finished and working before the next one is started — and
your assessor checks and signs every stage before you begin the next.
The ten stages are the order you work in; the
five tasks are what your assessor records the marks against — see
how the practical activity is marked.
Keep your record of progress up to date at every stage (booklet p.7–8).
Stages 1 – 3
Designing and costing
Read the brief. Decide what each switch means. Draw the system, prove it on screen, then price it.
Stage 1 — Block diagram4 marks
Task 1a · Booklet p.9–10
For each input, write down what logic 1 means. Then ask: does the warning need to come on when this input is 1, or when it is 0? An input that is the wrong way round has to be turned round inside your system.
How marks get lost here
Elements listed rather than joined up with arrows.
The boards, the wiring and the testing are all planned on paper before a single track is cut.
Stage 4 — Stripboard schematic diagrams4 marks
Task 2b · Booklet p.13
Count the holes you need before you draw anything, and leave a spare row at each end. Mark the track cuts and the test points first, then fit the components round them. The method, step by step, is Concept 5 on the Construction page; the Test points task in the stripboard tool below is the one that practises choosing them, which is where this stage most often loses a mark. Print the blank planning sheet to draw on.
You need the pin diagram for whichever chips your design uses. Every chip's datasheet PDF is linked from its product page on Rapid or RS — the same pages you used for costing in Stage 3 — and the two Electronics Club links below give pin numbering and the pinouts for the whole 74 series.
How marks get lost here
Track cuts missing.
Test points not planned onto the layout — fit them here, not when you are already soldering.
Parts drawn but not labelled with their item ID.
Sheets not attached to the booklet — they cannot be marked.
Decide your colours before you cut any wire, and write them into the schedule. Re-doing a loom costs a lesson.
Every run is its own wire, with its own number. Wire 4 stops at the terminal block; wire 9 carries on from the far side. Sixteen wires in all, and each one is a row in your schedule — number, colour, from, to, and what it carries. The colours and numbers here are an example; the boards are drawn empty because the layout is yours.How marks get lost here
Red or black used for a signal.
One colour used for every signal — that says every one of those points carries the same signal.
Write each description as two halves: what you will do, and what you expect to see. If you cannot say what you expect, you do not yet know what the test is for.
Pre-power-up — on every board, power OFF
Supply voltage and polarity correct — +5 V and 0 V the right way round.
Every component matches your parts list; resistor values and colour codes checked.
Polarised parts the right way round — the LED, the buzzer, and pin 1 of every IC.
Every track cut on your layout has actually been made.
No shorts, missing links or unintended bridges between tracks.
All joints clean and solid — no dry joints.
Continuity of the key connections checked with the power off.
No unused input left floating.
Functionality — on every board, power ON
Measure both supply rails first, before you test anything else.
Work input → process → output, one stage at a time, so a fault is trapped in one stage.
Go through every row of your truth table, not just the interesting ones.
Logic probe at gate inputs and outputs — record 1 or 0. Meter for the rails, and for any voltage or current you are asked for.
Check the output devices actually operate — the lamp lit and the buzzer sounding.
Compare every result against your simulation, point by point.
Date each row as you do it, and record any fault, what you changed, and the re-test.
Those are the checks that go on every board. The three marks are for the other half — which test point you will measure, and what you expect to read there.
How marks get lost here
Descriptions written after the testing instead of before it.
Tables left blank until the board is built.
Every reading written as a voltage — use a logic probe at the gate pins and record the logic level.
48 of the 70 marks. Input, then process, then output — each one finished and tested before the next is started.
Stage 7 — Input sub-system: construct, wire and test48 marks · 7–9
Tasks 3a, 3b and 4b · Booklet p.14–18
Test the input board on its own before you wire anything to it. A fault found on one board takes minutes; the same fault found on three takes a lesson.
How marks get lost here
Switches labelled SW1, SW2, SW3 with no mention of what each one simulates.
Unused inputs left untied.
Components fitted diagonally.
Test points on the loom only, none at the chips.
Rows left undated — the dated tables are your record of testing.
The changes column left blank where nil should be written.
Stage 9 — Output sub-system: construct, wire and test48 marks · 7–9
Tasks 3a, 3b and 4b · Booklet p.14–18
When all three boards are joined, work through your truth table one row at a time. The row that behaves wrongly tells you which part of the circuit to look at.
How marks get lost here
Switches labelled SW1, SW2, SW3 with no mention of what each one simulates.
Unused inputs left untied.
Components fitted diagonally.
Test points on the loom only, none at the chips.
Rows left undated — the dated tables are your record of testing.
The changes column left blank where nil should be written.
Not yet filmed. These links go live during the assessment;
until then they land on the offline-materials page, which is expected rather than a broken
link. There is no video for the simulation test or the whole-system pre-power-up check —
both are done exactly as the board-level ones are.
For teachers
Solutions are not published here
This is a mock practical activity, written for teaching and
practice rather than as a live assessment. The pages give hints and method, never answers —
the logic design, the truth tables and the worked solutions are deliberately kept off the
site so pupils cannot look them up.
Colleagues in other schools are welcome to the solutions.
Get in touch with Mr Stewart via the
contact page and they will be sent on.
